Webinar
RISC-V Coprocessor of the nRF54L Series
March 05, 2026 17:00 CET
In this webinar, we will introduce the RISC-V coprocessor of the nRF54L Series.
The RISC-V coprocessor follows an open standard Instruction Set Architecture, based on the RISC principle. It’s gaining a lot of traction in the industry thanks to its modular and license free approach.
We will discuss how it’s implemented in the nRF54L Series, and what are the best use cases, how to use it, and get the most of it in your projects and designs.
Agenda
What is RISC-V?
The RISC-V Coprocessor of the nRF54L Series
Use cases
Demos
Q&A
Sebastián Viviani
Developer Marketing Manager